This paper proposes an all-digital fully-integrated wireless transceiver to be used in short-range communication systems, like chip-chip.

Surveying recent transceiver systems research, most of the work is done either to accomplish very short-range communication, few μm, using inductive coupling, or long-range communication using RF. The first suffers from its limited range, whereas the second consumes higher amount of power while transferring data in less speed. This has shown a need to find a communication scheme in which higher data rates can be transferred for longer distances while consuming less amount of power. This research preserves power consumption using all-digital approach, and extends communication range by introducing the concept of multi-stage resonance data transfer.

Opposite to traditional approach, as will be discussed in chapter 3, the transceiver is designed using all-digital components on both its baseband and front-end. A novel modulation technique that allows employing only all-digital components in the transceiver is used, and the front-end uses all-digital sub-sampling for carrier demodulation, which does not need synchronization circuitry. Burst-errors generated by the front-end are corrected in baseband using hamming code and interleaving techniques. Experimentally, the all-digital transceiver was tested on FPGAs that performed successful wireless communication on distances up to 2 cm. Compared to recent researches, our transceiver has a higher data rate/MHz and smaller area.

To extend communication range, as detailed in chapter 4, an all-digital power amplifier architecture that is tunable and fully-integrated on chip using 0.18μm CMOS is used. The PA is designed using all- digital output-connected inverters controlled by a multi-phase clock generated using a multi-stage phase interpolator. Experimentally, in addition to the advantage of being all-digital and tunable, the PA consumed around 0.03 mW/MHz, which is less than power consumed in recently proposed designs.

Chapter 5 introduces multi-stage resonance, which is used to extend the communication range of the transceiver. This work experimentally evaluates the effectiveness of range extension by inserting 2 additional resonance coils in between the original transmitter and receiver coils to form a multi-stage resonance system. From measurement shown in chapter 6, total communication distance could be extended up to 100 mm, which is 42% increase compared to communication distance achieved when using single-resonance setup. Comparing with the state-of-the-art inductive coupling communication systems, this result shows 10 times higher (range/diameter) ratio.

In chapter 7, the system is implemented fully-integrated on-chip, and chip-chip communication is tested utilizing the analysis and measurement discussed in previous chapters. The efficiency of communication as a function of the quality factor of resonance and communication distance is analyzed, and the communication from a chip to chip is then tested experimentally, while recording the results.

The techniques and results presented in this thesis add a new perspective for the wireless transceiver system design. Instead of taking the typical approach and pursue the traditional path, by looking at the problem in a new perspective, and trying to solve it the unusual way, new solid results could be found, which can be used to introduce a new future for the wireless transceiver communication systems.

本論文は,All-Digital Fully-Integrated CMOS Wireless Transceiver for Chip-Chip Communication by Near-Field and Multi-Stage Resonance Coupling (和訳:多段磁気共鳴結合と近接場によるチップ間通信に向けたデジタル CMOS 無線トランシーバに関する研究)と題し,チップ間,チップ-ボード間の近接・非接触通信の通信距離を伸ばす手法に関する研究成果を纏めたもので,全8章よりなり,英文で記述されている.

第1章は,序論であり,本研究の背景として,設計の観点からのデジタル設計のアナログ設計に対する優位性,近接・非接触通信の研究現況について論じるとともに,本論文の構成について述べている.

第2章は,"Fundamentals of Wireless Communication (無線通信の基礎)"と題し,ASK,FSK,PSKと言ったデジタル変調方式および,誘導結合を用いたチップ間通信の研究動向に関して論じている.

第3章は,"Near-field Communication Using Modified BPSK (改良型BPSK手法を用いた近接場通信)"と題し,改良型BPSK変調手法の提案および本変調手法に適したサブサンプリング型復調手法の提案とサンプリングクロックのジッタ―・位相特性とエラーの関係およびSFDR特性の解析的な評価を行っている.さらに本変調手法の伝送エラー特性の解析から本手法に適したエラー訂正手法の提案とこれらを含めた通信システムのFPGAによる実装と近接通信の評価を行っている.

第4章は,"All-Digital Fully-Integrated CMOS Transceiver (全デジタル完全集積型CMOSトランシーバ)"と題し,第3章で提案した改良型BPSK手法に基づく変調・復調回路およびエラー訂正回路を搭載したトランシーバを,極力デジタル設計フローにのっとって0.18umCMOSチップを用いて実現し,送信特性に関して評価を行っている.

第5章は,"Analysis of Multi-stage Resonance System (多段磁気共鳴システムの解析)"と題し,電力伝送面から研究が進められてきた多段磁気共鳴システムの近接通信への適用に関して解析的な検討を行っている.

第6章は,"Measurement of Multi-stage Resonance (多段磁気共鳴の測定)"と題し,第5章の解析結果に基づき,4コイルシステムにおける伝送特性・バンド幅の実測による評価を行うことで,第3章で提案の改良型BPSK変調手法を用いた近接・非接触通信への適当可能性に関する評価を行っている.

第7章は,"Chip-Chip Communication Using Multi-stage Resonance (多段磁気共鳴を利用したチップ間通信)"と題し,第6章における多段磁気共鳴を用いた近接・非接触通信のチップ間通信への適用と,オンチップコイルの共振特性と通信距離,通信速度の関係に関して解析的およびシミュレーションにより評価し,実現可能性に関する議論を行っている.

第8章は,結論である.

以上要するに本論文は,近接・非接触通信においてデジタル回路設計により実現可能な変調・復調手法およびエラー訂正手法の提案と,誘導結合における通信距離の延長を実現する多段磁気共鳴手法の提案を行い実測およびシミュレーションにより実証したもので,半導体集積回路工学の発展に寄与するところが少なくない.

よって本論文は博士(工学)の学位請求論文として合格と認められる.