This thesis proposes lowpower, high performance and high functionality power supply circuits and architectures toward on-chip distributed power supply systems which are suitable for current and future LSI's.

The thesis is organized into 7 chapters. The first chapter includes motivation and goal of this thesis. On-chip distributed power supply system is valuable for both the power integrity issue and multiple power supply to several types of chips and circuit blocks integrated in a package. In the background, there is a fact that the optimum power supply voltage differs between different types of function blocks and they are not suppressed as technology scales down. In a distributed power supply system, power is supplied from outside the package using one high voltage and it is converted to required lower supply voltages using DC-DC converters at the vicinity of the load circuits. By doing so, the total input current for one package and power line noise issue caused by parasitic resistances and inductances are reduced.

Chapter 2 introduces three types of conventional on-chip step-down DC-DC converters. The first one is a linear regulator which is useful for on-chip implementations and suitable for applications which require low voltage ripple. Linear regulators however, have low power efficiencies when the voltage conversion ratio is low. The second one is a buck converter which performs higher power efficiency compared with the linear regulator, instead of the area overhead caused by the output LC filter and the implementation complexity. The third one is a switched capacitor DC-DC converter which is suitable for low current applications. Switched capacitor converters need an external circuit such as a linear regulator for voltage regulation. Both the operation principles and research trends on these three types of DC-DC converters are introduced in this chapter.

Chapter 3 proposes novel implementation methodologies of on-chip buck converter for higher power efficiency and lower cost. By implementing passive and active elements of a buck converter on chips or interposers in different technologies and connecting them with each other through metal bumps and vias, power and cost effective implementations are achievable. Especially two chips implementation and two chips plus one interposer implementation are discussed in this thesis. Moreover, how to implement the switching elements which are tolerant of high input voltage is discussed. By using high tolerance voltage I/O transistors, the number of cascaded transistors can be reduced instead of over all power efficiency reduction. The optimum implementation method mixing different types of transistors for higher power efficiency and smaller area is discussed as well in this chapter.

Maintaining the supply voltage in time domain according to the required performance of the load circuit is another important aspect of power supplies especially in case of lowpower digital circuits. Chapter 4 describes the methodologies to quickly change and settle the output voltage of on-chip DC-DC converters. In case of linear regulators, voltage hopping acceleration up to ns-order of transition time is available by putting large transistors named VDD-hopping accelerators in parallel with the load circuit and shorting them so quickly. By applying analog mirror delay circuit, the accelerator can be controlled robustly independent of the size of the acceleration transistors, load current and load capacitance. In case of buck converters, there occurs voltage ringing issue caused by the output LC filter when the output voltage is changed quickly by the VDD-hopping accelerator. Solutions of this problem are discussed as well in the later half of this chapter. Proper timing control is one of the keys to successfully accelerate the output voltage hopping of a buck converter.

In chapter 5, a power supply circuit which performs a collaborative operation of a linear regulator and a buck converter is presented. The circuit settles the output voltage much faster than a conventional single mode buck converter, with assistance by a linear regulator put in parallel, while it achieves high steady-state power efficiencies equal to those of conventional buck converters. Proper control of the linear regulator and the buck converter achieves a smooth wake-up. The power supply works as power gating circuit for leakage current reduction of the load circuit as well.

On the other hand, inter chip wireless communication technologies using inductive or capacitive coupling are investigated aiming at lowpower and high-speed communications between stacked chips in SiP's in recent years. The communication performance basically depends on the chip-to-chip distance, and the bonding wires for power supply lines prevent them to get close with each other. By transmitting not only the signal but also the power between chips, both low assembly cost and higher communication performance are achievable. Circuit techniques and design methodology using inductive coupling for chip-to-chip wireless power transmission are presented in chapter 6.

Finally, the thesis concludes in chapter 7.

本論文は「Circuit Technologies for On-Chip Power Supply Systems」(和訳:オンチップ電源システムに向けた電源回路技術)と題し、将来の集積回路向け電源供給回路に要求される性質を考察するとともに、オンチップ分散電源システムの実現を目指し、高効率かつ豊富な機能性を備えたオンチップ電源回路の実現手法を提示するもので、全7章で構成されている。

第1章は「Introduction」(序論)であり、今後のより高い集積度を持つ集積システムに向けた電源回路の要求事項や課題について述べるとともに、本研究の背景を述べ、目的を明確化している。

第2章は「Conventional on-chip step-down DC-DC converter」(従来の降圧型DC-DCコンバータ)と題し、従来のリニアレギュレータ、バックコンバータ、スイッチトキャパシタコンバータの動作原理、オンチップ化時の課題等について考察し、近年の顕著な関連研究について概説している。

第3章は「High efficiency on-chip buck converter」(高効率なオンチップ・バックコンバータ)と題し、オンチップ・バックコンバータの主要な電力損失要素と各設計パラメータによる影響を明らかにし、能動素子と出力フィルタ用受動素子を異なるチップ及びインタポーザに実装し、積層構造によって高効率・低コストのオンチップ・バックコンバータが実現できる可能性を示した。

第4章は「VDD-hopping accelerator」(VDDホッピング・アクセラレータ)と題し、電源回路の出力ノードを高電圧及び低電圧ノードに短時間短絡することで高速に電圧変更を行う手法を提案。0.35μmCMOSリニアレギュレータに本手法を適応した場合に5nsでの電圧変更を実証。またバックコンバータに本手法を適応した際の共振の問題を明らかにし、適切に電圧変更を行うための制御回路を提案、本手法の適用範囲をより広いものとした。

第5章は「Hybrid operation of linear regulator and buck converter」(リニアレギュレータとバックコンバータの複合動作)と題し、リニアレギュレータとバックコンバータの並列動作、及び各単体動作の間の安定なモード切換えの手法を提案、これにより一定の負荷電流を供給しながらも高速に電圧を立ち上げ、かつ高い定常状態電力効率を実現、更にパワーゲーティング機能も合わせ持つ電源回路の動作を0.18μmCMOSプロセスにおいて実証した。

第6章は「Chip-to-chip wireless power transmission」(チップ間ワイヤレス電源伝送)と題し、磁界結合により電力をチップ間ワイヤレス伝送する手法を提案、試作を通じて有用性を実証すると共に、より高い伝送電力・電力効率を実現するための設計手法を導いた。

第7章は「Conclusions」(結論)であり、本研究の成果を要約し結論を述べている。

以上のように本論文は、将来のオンチップ電源回路として、チップやインターポーザの積層構造を利用した高効率バックコンバータ、電源電圧遷移を高速化したリニアレギュレータ、高効率でかつ電源電圧遷移が高速な異種複合電源回路、およびチップ間無線電源伝送回路を提案し、その有効性を集積回路の設計、試作、測定を通じて実証したものであって、電子工学上寄与するところが少なくない。

よって本論文は博士(工学)の学位請求論文として合格と認められる。