学位論文要旨



No 125302
著者(漢字) 李,宥憲
著者(英字)
著者(カナ) イ,ユホン
標題(和) 金属メッキMEMSアクチュエータとCMOSデジタル制御回路のモノリシック集積化に関する研究
標題(洋) A Study on Monolithic Integration of Electroplated MEMS Actuators with CMOS Digital Control Circuits
報告番号 125302
報告番号 甲25302
学位授与日 2009.09.28
学位種別 課程博士
学位種類 博士(工学)
学位記番号 博工第7146号
研究科 工学系研究科
専攻 電気工学専攻
論文審査委員 主査: 東京大学 教授 年吉,洋
 東京大学 教授 藤田,博之
 東京大学 教授 櫻井,貴康
 東京大学 准教授 金,範
 東京大学 准教授 杉山,正和
 東京大学 准教授 高宮,真
内容要旨 要旨を表示する

This study is about integration of micromirror and its control circuits for self oscillation at the resonant frequency of the scanner. The integration process is perfectly CMOS compatible electroplating.

Micromachined scanners have a lot of applications. One powerful candidate application is optical coherent tomography (OCT) of which merits are high resolution and penetration up to millimeter range of human tissue. OCT system with micromachined scanner makes miniaturization and large tilting angle possible. The larger tilting angle, the wider range of human epidermis or retina with small energy. On the opposite side of the advantages of the microscanner in OCT system, electro-statically actuated scanners require high voltage for large displacement, which is not suitable internal operation. In recent researches, external power is not supplied through copper wire. They adopt solar cell inside the OCT head units instead. Because of low efficiency of the present solar cell, it is much difficult to obtain high voltage for driving.

As shown at the above, low voltage actuated scanners are the first demand. This study takes another route to get large tilting angle not by high driving voltage but by resonance oscillation. The scanner should be equipped with its control parts for resonance vibration. At the same time the control parts and the scanner have to be merged in a form of a system on a chip (SoC) for internal body operation. Control algorithm and fabrication process for integration are considered as the target of this study.

Among pre-CMOS, intermediate-CMOS and post-CMOS methods for integration, the last one is adopted as the integration style of this study. It is to make micromachines on top of the multi user service CMOS chip. All the area of the chip can be used for micromachines. The main process is electroplating. Electroplating is low temperature process and does not have high power of plasma which may damage to CMOS circuits. By use of closed loop control circuits, the mechanical resonance is achieved by tracing the Eigen frequency. The close loop is a modified phase locked loop (PLL) which is composed of a voltage controlled oscillator (VCO), a phase shifter, a phase detector, and a displacement sensor.

The micromachined devices with PLL algorithm for resonant vibration and CMOS-MEMS integration through electroplating is MEMS gyroscopes. The PLL has capacitive sensors for feedback. They are linear, small, sensitive, consuming low power, insensitive to temperature drifts, and it is easy to be integrated with other micromachines. Moreover, they do not need special material like piezoresistive/piezoelectric method although their drawback is measurement of very small differential capacitances meaning that they are very sensitive to parasitic capacitances and electromagnetic interference, and that the pick-off electronics may be complex. Moreover, most widely used capacitive sensing method, charge amplifier technique, must be equipped with amplifier. It is usually an operational amplifier which is supposed to have high power consumption.

A novel but simple sensing method is presented in this study, which is digital sensing method as an original idea. A protrusion at side of mirror plate or hinge touches bottom electrode, then the contact resistance between the stud and the electrode changes from infinity to finite value. By connecting external resistor in series between power line and ground, a voltage divider is built. The output of the voltage divider becomes VDD or ground when the protrusion does not touch bottom electrode and indicates a certain values determined by the serial resistors ratio when it hard contact the bottom.

By the digital sensing method, perfectly digital control blocks which promise more reliability are achieved and integration process on top of a chip fabricated by standard CMOS will provide a universal platform of CMOS-MEMS integration to other researchers.

As the first step of the research, analysis by computer aided design was done by MATLAB Simulink and HSpice. On the basis of both the force equation at parallel plates and the equation describing quadratic oscillation, the scanner model was built by for MATLAB Simulink blocks. The frequency response of the model showed the same result with the quadratic oscillation even the model is nonlinear. As the next step of modeling and analysis, HSipice simulation was carried out. It is meaningful because HSpice tells exactly the designed chip would work correctly or not in real world. Before employment of HSpice, analogies between mechanical system and electrical system were introduced. HSpice does not have parameters for mechanical simulation. Therefore, mechanical parameters were converted into electrical parameters based on the analogies. The HSpice model also reflected correct result as the MATLAB model showed. Thereafter the two previous models were combined with other control blocks. Both cases were obvious that the VCO input was maintained at a certain DC value which produces constant frequency. The amplitude plots of the scanner models stay at maximum and 90 degree delay compared to driving signal. The modified PLL algorithm was expected to work correctly.

The temperature at each unit fabrication process was observed and the highest temperature is photoresist bake temperature. The proposed electroplating step is safe for post-CMOS process. The first step is bottom metal interconnection and electrode patterning. Material is Cr/Au or Ni for protection of aluminum pad of CMOS circuits. The second step is sacrificial layer deposition by evaporation. Material is copper for selective etching. The thickness was 1.4um and it is so precisely controllable that the driving signal level has high degree of freedom in mechanical design. The third step is nickel structure electroplating. The recommended temperature is 55 degree, which does not affect any degradation to aluminum interconnection in CMOS chip. The mold for electroplating should be thicker sufficiently than target metal height. The forth step is release by nickel compatible copper etchant. It is diluted mixture of acetic acid and hydrogen peroxide. After release, it should be very careful not to happen stiction by wafer vaporization between structure and substrate.

The scanners were actuated by less than 5V, which means pull in happened around 4V. The contact resistance is very important value to determine proper value of external resistance. It was 3.3 kΩ, which should be reduced much more. Preferable value is less than 10Ω. By surface coating with gold can enhance contact resistance.

Main CMOS circuit blocks are VCO, phase shifter, and phase detector. When VCO has very high output frequency, a frequency divider is needed. The VCO is a ring oscillator with a variable resistor which is an NMOS transistor. By input voltage resistance change becomes time constant variation of the ring oscillator. Large value of time constant causes low frequency VCO output and vise versa. The divider is a series of a D flip flop which has D input and negated Q connected. It is called half divider. The half dividers were also used in phase shifter instead of Hilbert transform. One half divider and an XOR gate made a phase shifter. Phase detector is well known phase/frequency detector with a charge pump.

The design chip will be delivered by July. The measurement of the chip and integration process will follow to prove the idea of the study, which is that presentation of digital sensing method for simple position detector and that CMOS-MEMS monolithically integrated system on standard CMOS process will become a universal platform for researches on CMOS-MEMS integrated system.

審査要旨 要旨を表示する

本論文は "A Study on Monolithic Integration of Electroplated MEMS Actuators with CMOS Digital Control Circuits" (邦訳:金属メッキMEMSアクチュエータとCMOSデジタル制御回路のモノリシック集積化に関する研究)と題し、マルチユーザー・マルチチップ型のLSIファウンドリを用いて製作した集積回路の上に、後から半導体マイクロマシニング技術を用いてMEMS(Micro Electro Mechanical Systems)アクチュエータを形成して両者をモノリシック集積化する技術について、その集積法の目的、集積化の方法、製作技術、評価技術、集積回路技術との整合性、および、具体的な応用についてまとめたものであり、英文による全9章で構成されている。

第1章は "General Introduction" (序論)であり、本研究の背景技術について述べている。従来のCMOS-MEMS集積化技術においては、応用デバイス毎に設計法、製作法を個別に開発していた問題点を指摘し、標準化CMOS-MEMS集積技術の実現のためには、回路-電気構造の連成解析手法、MEMS構造と整合性のよい回路設計アーキテクチャ、および、CMOSデバイスとの整合性のよいMEMSポストプロセスの3点が必要であることを述べるとともに、本論文の目的と研究の意義、論文の構成について説明している。

第2章は "Modeling a quadratic oscillation system over pull-in range" (静電プルイン領域を超えた二次共振系に関するモデル)である。ここでは、CMOS回路とモノリシック集積化したMEMSデバイスには、変位-電圧の静電駆動特性の非線形性領域(プルイン領域)を利用したものが多く開発されているのに対し、従来の集積回路設計CADに基づいた静電MEMSアクチュエータの解析手法では変位-駆動電圧の非線形性を取り扱えないという問題点を指摘するとともに、これを解決する手法として,従来の制御システム解析ソフトに新考案の条件判断ブロックを挿入する方法を提案し、静電アクチュエータの大振幅非線形特性を解析可能にした成果が述べられている。

第3章は "Displacement sensing method and a digital sensor" (変位検出の方法とそのデジタル検出)であり、集積化MEMSに必要な微細構造の機械的変位をチップ内で計測する一般的な手法を比較し、CMOSデジタル制御回路に整合性のよい手法として、MEMSの機械的接触を電気的に検出する方法を考案するとともに、具体的な予備実験の結果を述べている。

第4章は "Design and Fabrication of a micromachined torsion plate" (マイクロマシニングによる傾斜平板構造の設計と製作)であり、CMOS回路上への後工程として整合性の良い電気メッキ法を用いて、MEMS構造の犠牲層と構造層を作り分ける手法について、具体的な問題点を交えて論じている。

第5章は "Improved design and fabrication of a torsion plate" (傾斜平板構造の設計と製作に関する改善)であり、前章のプロセスの問題点を改善し、低電圧CMOS駆動に適した構造設計を実現するための手法について論じている。

第6章は "Fabrication for monolithic integration" (モノリシック集積化手法)であり、実際にCMOSファウンダリ・サービスを用いて試作した1.2ミクロン設計ルールの集積回路上に第6章で説明した金属メッキ法を用いてMEMS可動構造を集積化する手法について論じており、他の集積化MEMSプロセスとの客観的比較検討結果についても報告している。

第7章は "An example of a CMOS-MEMS integrated system" (CMOS-MEMS集積化手法の例)であり、前章までに研究開発した集積化手法を実際に用いて、MEMS静電駆動型の振動子を形成し、それを電圧制御発振子として用いる手法に関して述べている。

第8章は "Another example of a CMOS-MEMS integrated system" (CMOS-MEMS集積化手法の例2)であり、本論文で述べた連成解析手法、回路設計アーキテクチャ、および、MEMSポストプロセス手法を用いてCMOS回路上のMEMS振動子を集積化し、それによって構成した位相ループロック型の発振回路の評価結果について論じている

第9章は "Conclusion" (結論)であり、本論文で示した成果を総括している。

以上これを要するに、本論文は、集積化CMOS-MEMS技術の適用範囲拡大を目的として、電気-機械集積構造を連成解析する手法、デジタル集積回路との整合性のよいMEMS設計手法、および、CMOS製造プロセスとの整合性のよいMEMSポストプロセスの3点について、それぞれ標準化が可能な手法を新たに考案するとともに、実際に同技術を用いてCMOS-MEMS型の集積化システムを製作し、回路とMEMS素子の間の製造上の整合性と、性能に与える影響を実験的に検証したものであり、電気工学に貢献するところが少なくない。

よって本論文は博士(工学)の学位請求論文として合格と認められる。

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