The explosive growth of data capacity in communication networks has created new problems to be solved by the research community. The conventional optical-electrical-optical (OEO) networks are suffering from high power consumption. This problem is expected to be more serious in the future because the data capacity is estimated to continue increasing exponentially. Replacing the OEO configuration with transparent optical switching is promising to increase the energy efficiency by avoiding O/E and E/O conversion, (de)multiplexing and bit-by-bit processing. Optical packet switching (OPS) is particularly attractive because it offers the highest network utilization efficiency with bursty traffic.

OPS demands optical components with specifications beyond the state of the art, which makes it difficult to adapt this technology. The optical switch matrix has to reconfigure in time scales of a few nanoseconds or shorter. Moreover, the throughput of the switching fabric in a core OPS node has to be scalable to ultra-high levels approaching or exceeding 1 Pb/s in the near future. The buffer also has to reach sufficient capacity in accordance with the throughput. Optical space switches can be building blocks of both switch matrices and tunable buffers. However, traditional integrated semiconductor switching technologies have difficulties in scaling to ultra-large capacities due to problems including signal quality degradation, footprint, and power consumption.

This dissertation focuses on a novel type of high-speed integrated photonic switch to extend the capacity limit of OPS. This device, referred as phased-array switch, has a number of unique properties. It can theoretically switch to hundreds of output ports in a single stage without cascading; it can switch multi-wavelength signals; and it is completely passive. After a detailed description of the principle of operation of this switch and its design issues, experimental research on this device is presented. The first integrated 1×16 semiconductor photonic switch is among the switches introduced in this section. This device, which demonstrates wavelength dependence less than 0.7 dB in the entire C-band (1530-1565nm), on-chip loss below 7 dB, average extinction ratio of 18.6 dB, and complete dynamic operation with a response time of 11 ns (limited by the controlling electronics), has improved the state of the art in integrated semiconductor photonic switching considerably. Another switch exhibits a polarization-dependent loss less than 2.2 dB mostly caused by the polarization dependence of the propagation loss. Moreover, an amplitude-controlled integrated phased-array switch is proposed and investigated theoretically for the first time. This device is capable of switching to an arbitrary combination of output ports simultaneously, i.e. multicasting.

Furthermore, experiments with an OPS node constructed from an all-optical label extractor, a phased-array switch, and an electronic switch controller are presented. There are several OPS demonstrations in the literature, but what makes these experiments special is the demonstration of modulation-format-agnostic routing compatible with wavelength-division multiplexing (WDM). In separate experiments, 160-Gb/s optical time-domain multiplexed (OTDM) on/off keying (OOK) and 120-Gb/s WDM differential phase-shift keying (DPSK) packets have been switched to 16 ports with power penalties below 0.7 dB. The OPS node has operated without manual control throughout the experiments. This OPS node can route packets with arbitrary modulation formats and bit rates as long as they fit in its ultra-broad bandwidth (1 dB bandwidth over 4.5 THz). Especially the modulation format independence is very important since spectrally efficient advanced modulation formats are likely to be used in the future.

An advanced photonic integrated circuit (PIC) consisting of hundreds of monolithic active and passive devices is also reported in this thesis. This fully integrated 1×100 switch fits in a footprint of 6mm × 6.5mm including the electrodes. PICs of this type are necessary for low-cost, compact and low-power optical switching; and this PIC shows that phased-array switches have high level of integrability.

Finally, the estimated power consumption of ultra-large-capacity buffered optical packet switching fabrics is studied. Large-scale PICs comprising phased-array switches are assumed to be used for both routing and delay-line-based tunable buffering. The estimated energy per bit consumed by the buffer, switch matrix, switch controller and the semiconductor optical amplifiers to compensate for the optical loss in a hypothetical 1000×1000 router is less than 1.5 pJ/bit. The analysis is based on near-future device characteristics. A router of this scale has a maximum throughput of 1 Pb/s if the payload bit rate is 1 Tb/s per fiber. At this throughput level, phased-array switching is estimated to be 9.4 times as energy-efficient as broadcast-and-select switching, a common transparent switching scheme employed in OPS experiments.

To sum up, this thesis comprises experimental and theoretical research focusing on the application of phased-array switches in ultra-large-capacity OPS nodes. This study, which extends over the borders of device, circuit and subsystem level research, confirms that phased-array switches offer a serious potential for the future OPS networks if a number of technical challenges, mostly related to photonic integration, are overcome.

本論文は,"Integrated phased-array photonic switches for ultra-large-capacity optical packet routing (超大容量光パケットルーティングのための集積化フェーズアレイ型光スイッチに関する研究)"と題し,将来の大容量全光パケットスイッチングに適する大規模化可能で高速な新たな半導体光スイッチの試作・開発を行った結果について英文で纏めたもので,7章より構成されている.

第1章は序論であって,研究の背景,動機,目的と,論文の構成が述べられている.

第2章は"Integrated phased-array photonic switching"と題し,本論文で対象とするフェーズアレイ型光スイッチのコンセプトに関し論じている.まず光位相アレイの基本を概観した後,本スイッチの原理および設計法について述べ,さらに他の光スイッチとの比較を行っている.本スイッチは,原理的には単一段で数百の出力ポートにスイッチングできること,多波長光信号を一括でスイッチできること,光受動素子のみで構成できること等を特長としている.また,マルチキャスト光スイッチングに利用できる光振幅制御機能付きのフェーズアレイ光スイッチについても,その提案と理論解析を行っている.

第3章は"Integrated 1xN phased-array photonic switches: design, fabrication and characterization"と題し,本研究で試作した1.55μm帯InP系フェーズアレイ型光スイッチの設計,作製法,評価について論じている.まず1x8スイッチをInP基板上に試作し,同素子において2.2dB以下の低い偏波依存性を実現した.その成果に基づき,半導体系では最大規模となる1x16スイッチを作製して,Cバンド全域(1530-1565nm)で0.7dB以下の低波長依存性,7dB以下のオンチップ損失,18.6dBの平均消光比,11nsのスイッチング時間など,世界最高レベルの性能を得ることに成功した.

第4章は"High-bit-rate optical packet switching experiments"と題し,フェーズアレイ型光スイッチ,全光ラベル抽出器およびスイッチ制御電子回路からなる光ノードプロトタイプによる光パケットルーティング実験について論じている.160Gb/sの光時分割多重強度変調パケット並びに120Gb/s波長多重DPSK (differential phase-shift keying)光パケットを,0.7dB以下のパワーペナルティで,16個の出力ポートにスイッチングしている.本パケットスイッチングノードは,フェーズアレイ型光スイッチの4.5THzの帯域に収まる限り,どのようなビットレートでも変調フォーマットでも対応可能であることが実際に示された.

第5章は"Photonic integrated circuit for 100-port transparent switching"と題し,数百の光能動/受動素子を集積化した光スイッチング集積回路の設計と試作について論じている.設計した1x100のモノリシック集積光スイッチ回路は,電極も含め6mm x 6.5mmのフットプリントに収まる.本光集積回路の試作により,フェーズアレイ型光スイッチの高いレベルの集積化適性が実証された.

第6章は"Power consumption in buffered optical packet switch fabrics utilizing phased-array switches"と題し,超大容量のバッファー付き光パケットスイッチングノードの電力消費量を試算している.本論文で対象とするフェーズアレイ型光スイッチをルーティングと光バッファリングの双方に利用することを仮定している.光バッファー,マトリクス光スイッチ,スイッチ制御部および損失補償用の半導体光増幅器からなる1000x1000光ルータの1ビット当り消費エネルギーは1.5pJと算出された.1ファイバー当り1Tb/sの容量であれば,本ルータは1Pb/sのスループットを有することになり,同等のスループットの光ルータを一般的なブロードキャスト・アンド・セレクトスイッチを用いて構成する場合に比べ,9.4倍エネルギー効率が高くなると予測している.

第7章は結論であって,得られた成果を総括するとともに将来展望について述べている.

以上のように本論文は,波長多重全光パケットスイッチングに最適な1.55μm帯フェーズアレイ型光スイッチをInP系化合物半導体に基づいて試作開発し,1x16のスイッチ規模や11nsのスイッチング時間など第一級の性能を実現するとともに,同スイッチを全光スイッチングノードに応用してビットレート・変調フォーマットに依らない全光パケットルーティングが可能であることを実証し,さらに1x100集積光スイッチ回路の先鞭をつけ,ネットワーク省電力化への効果を定量的に明らかにしたもので,電子工学分野に貢献するところが多大である.

よって本論文は博士(工学)の学位請求論文として合格と認められる.